DDR3 verilog 代码，包含项目以及测试testbench，包括数字部分以及ddrphy

[{"title":"（ 37 个子文件 167KB ） DDR3 verilog 代码，包含项目以及测试testbench，包括数字部分以及ddrphy ","children":[{"title":"2022448_DDR3","children":[{"title":"other","children":[{"title":"intf.svh <span style='color:#111;'> 2.08KB </span>","children":null,"spread":false},{"title":"ddr3_dfi_seq_copy.v <span style='color:#111;'> 8.67KB </span>","children":null,"spread":false},{"title":"ddr3_core.v <span style='color:#111;'> 60.59KB </span>","children":null,"spread":false},{"title":"xxx.v <span style='color:#111;'> 0B </span>","children":null,"spread":false},{"title":"ddr3_ref.v <span style='color:#111;'> 162.86KB </span>","children":null,"spread":false},{"title":"2048Mb_ddr3_parameters.vh <span style='color:#111;'> 52.85KB </span>","children":null,"spread":false},{"title":"ddr3.sv <span style='color:#111;'> 165.69KB </span>","children":null,"spread":false},{"title":"1024Mb_ddr3_parameters.vh <span style='color:#111;'> 53.70KB </span>","children":null,"spread":false},{"title":"ddr3_core copy.v <span style='color:#111;'> 19.55KB </span>","children":null,"spread":false},{"title":"testbench.v.bak <span style='color:#111;'> 4.93KB </span>","children":null,"spread":false}],"spread":true},{"title":"dc","children":null,"spread":false},{"title":"vcs","children":[{"title":"compile.log <span style='color:#111;'> 9.27KB </span>","children":null,"spread":false},{"title":"simv.daidir","children":[{"title":"simv.kdb <span style='color:#111;'> 249B </span>","children":null,"spread":false},{"title":"prof.sdb <span style='color:#111;'> 8.95KB </span>","children":null,"spread":false},{"title":"debug_dump","children":[{"title":"dve_debug.db.gz <span style='color:#111;'> 2.27KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"macro.list <span style='color:#111;'> 2B </span>","children":null,"spread":false},{"title":"file.list <span style='color:#111;'> 119B </span>","children":null,"spread":false},{"title":"run_vcs.sh <span style='color:#111;'> 407B </span>","children":null,"spread":false}],"spread":true},{"title":"tb","children":[{"title":"aximaster_to_ddr3axi_tb.sv <span style='color:#111;'> 16.19KB </span>","children":null,"spread":false},{"title":"test1.sv <span style='color:#111;'> 12.61KB </span>","children":null,"spread":false},{"title":"fifo_test.v <span style='color:#111;'> 1.15KB </span>","children":null,"spread":false}],"spread":true},{"title":"modelsim","children":null,"spread":false},{"title":"sim","children":[{"title":"run_sim.sh <span style='color:#111;'> 62B </span>","children":null,"spread":false},{"title":"wave_gen.tcl <span style='color:#111;'> 86B </span>","children":null,"spread":false},{"title":"run_verdi.sh <span style='color:#111;'> 87B </span>","children":null,"spread":false}],"spread":true},{"title":"rtl","children":[{"title":"16_2048_sg15.svh <span style='color:#111;'> 17.00KB </span>","children":null,"spread":false},{"title":"testbench.v <span style='color:#111;'> 6.39KB </span>","children":null,"spread":false},{"title":"ddr_controller.v <span style='color:#111;'> 11.44KB </span>","children":null,"spread":false},{"title":"ddr3_dfi_phy.v <span style='color:#111;'> 54.02KB </span>","children":null,"spread":false},{"title":"beizhu.txt <span style='color:#111;'> 4.59KB </span>","children":null,"spread":false},{"title":"jindu.txt <span style='color:#111;'> 792B </span>","children":null,"spread":false},{"title":"ddr3_axi_pmem.v <span style='color:#111;'> 41.99KB </span>","children":null,"spread":false},{"title":"ddr3_core.v <span style='color:#111;'> 68.49KB </span>","children":null,"spread":false},{"title":"ddr3_axi_retime.v <span style='color:#111;'> 8.33KB </span>","children":null,"spread":false},{"title":"ddr3_dfi_seq.v <span style='color:#111;'> 4.34KB </span>","children":null,"spread":false},{"title":"async_fifo.v <span style='color:#111;'> 4.13KB </span>","children":null,"spread":false},{"title":"defs.svh <span style='color:#111;'> 1.82KB </span>","children":null,"spread":false},{"title":"ddr3.v <span style='color:#111;'> 166.62KB </span>","children":null,"spread":false}],"spread":false},{"title":"beifen_old","children":[{"title":"ddr3_core521.v <span style='color:#111;'> 56.78KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}],"spread":true}]