quartus仿真设计的8-3线译码器电路
在Quartus II软件制作，使用Quartus II的电路仿真功能，制作的8-3线译码器电路设计。Quartus II仿真可以使用波形仿真功能，便于学习理解。
笔者也是初学者，先熟悉电路仿真部分，作此文章记录Quartus II实验，留待慢慢研究学习。
Quartus II design 是最高级和复杂的，用于system-on-a-programmable-chip (SOPC)的设计环境。 Quartus II design 提供完善的 timing closure 和 LogicLock基于块的设计流程。Quartus II design是唯一一个包括以timing closure 和 基于块的设计流为基本特征的programmable logic device (PLD)的软件。
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