[{"title":"( 8 个子文件 725KB ) 雷尼绍BISS-C协议编码器Verilog源码:支持多配置、高时钟频率、易于移植部署及CRC并行计算 · Verilog","children":[{"title":"必备方法【必备】.md <span style='color:#111;'> 3.13KB </span>","children":null,"spread":false},{"title":"FPGA","children":[{"title":"2.jpg <span style='color:#111;'> 101.60KB </span>","children":null,"spread":false},{"title":"1.jpg <span style='color:#111;'> 49.77KB </span>","children":null,"spread":false},{"title":"3.jpg <span style='color:#111;'> 104.38KB </span>","children":null,"spread":false}],"spread":true},{"title":"实用资源.docx <span style='color:#111;'> 37.63KB </span>","children":null,"spread":false},{"title":"雷尼绍BISS-C协议编码器Verilog源码:支持多配置、高时钟频率、易于移植部署及CRC并行计算.html <span style='color:#111;'> 1.06MB </span>","children":null,"spread":false},{"title":"FPGA中雷尼绍BISS-C协议编码器Verilog源码设计与实现:支持多路配置及高效CRC并行计算.pdf <span style='color:#111;'> 100.79KB </span>","children":null,"spread":false},{"title":"Verilog编码器源代码展示.docx <span style='color:#111;'> 37.14KB </span>","children":null,"spread":false}],"spread":true}]