CRC校验verilog代码生成工具

上传者: cjie221 | 上传时间: 2026-05-04 09:29:34 | 文件大小: 73KB | 文件类型: ZIP
在cmd命令提示符窗口,进入解压后目录crc-gen,输入命令 举例:D:\crc-gen> crc-gen verilog 8 16 8005 命令用法:crc-gen language data_width poly_width poly_string 命令参数意义: language : verilog or vhdl data_width : 输入数据位宽 poly_width : 校验多项式简记式位宽 poly_string : CRC校验简记式 注:输入数据的最高位MSB在串行操作时是输入多项式的第1 bit。 另外提供modelsim仿真工程可用于对生成的verilog代码仿真验证。

文件下载

资源详情

[{"title":"( 18 个子文件 73KB ) CRC校验verilog代码生成工具","children":[{"title":"crc16_d8_sim","children":[{"title":"sim","children":[{"title":"tb_top.bat <span style='color:#111;'> 18B </span>","children":null,"spread":false},{"title":"tb_top.do <span style='color:#111;'> 3.20KB </span>","children":null,"spread":false}],"spread":true},{"title":"rtl","children":[{"title":"crc16_serial.v <span style='color:#111;'> 1.43KB </span>","children":null,"spread":false},{"title":"crc16_parallel.v <span style='color:#111;'> 3.96KB </span>","children":null,"spread":false}],"spread":true},{"title":"testbench","children":[{"title":"tb_top.v <span style='color:#111;'> 2.85KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"crc-gen","children":[{"title":"CRC校验简记式意思.txt <span style='color:#111;'> 1.00KB </span>","children":null,"spread":false},{"title":"crc-gen.exe <span style='color:#111;'> 12.50KB </span>","children":null,"spread":false},{"title":"crc-gen","children":[{"title":"stdafx.h <span style='color:#111;'> 516B </span>","children":null,"spread":false},{"title":"crc-gen.sln <span style='color:#111;'> 878B </span>","children":null,"spread":false},{"title":"crc-gen.vcproj <span style='color:#111;'> 4.40KB </span>","children":null,"spread":false},{"title":"crc-gen.cpp <span style='color:#111;'> 14.59KB </span>","children":null,"spread":false},{"title":"stdafx.cpp <span style='color:#111;'> 294B </span>","children":null,"spread":false}],"spread":true},{"title":"crc-gen.pdf <span style='color:#111;'> 56.04KB </span>","children":null,"spread":false}],"spread":true},{"title":"crc16_d32_sim","children":[{"title":"sim","children":[{"title":"tb_top.bat <span style='color:#111;'> 18B </span>","children":null,"spread":false},{"title":"tb_top.do <span style='color:#111;'> 3.09KB </span>","children":null,"spread":false}],"spread":true},{"title":"rtl","children":[{"title":"crc16_serial.v <span style='color:#111;'> 1.43KB </span>","children":null,"spread":false},{"title":"crc16_parallel.v <span style='color:#111;'> 7.57KB </span>","children":null,"spread":false}],"spread":true},{"title":"testbench","children":[{"title":"tb_top.v <span style='color:#111;'> 2.73KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}],"spread":true}]

评论信息

免责申明

【只为小站】的资源来自网友分享,仅供学习研究,请务必在下载后24小时内给予删除,不得用于其他任何用途,否则后果自负。基于互联网的特殊性,【只为小站】 无法对用户传输的作品、信息、内容的权属或合法性、合规性、真实性、科学性、完整权、有效性等进行实质审查;无论 【只为小站】 经营者是否已进行审查,用户均应自行承担因其传输的作品、信息、内容而可能或已经产生的侵权或权属纠纷等法律责任。
本站所有资源不代表本站的观点或立场,基于网友分享,根据中国法律《信息网络传播权保护条例》第二十二条之规定,若资源存在侵权或相关问题请联系本站客服人员,zhiweidada#qq.com,请把#换成@,本站将给予最大的支持与配合,做到及时反馈和处理。关于更多版权及免责申明参见 版权及免责申明