his document defines the next generation USB industry-standard, USB 3.0. The specification describes the protocol definition, types of transactions, bus management, and the programming interface required to design and build systems and peripherals that are compliant with this specification.
2021-09-30 11:50:13 3.46MB USB3
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hisi3559原有内核不带有can总线驱动,该补丁实现了can bus的总线驱动,3559 can 补丁文件 总线驱动
2021-09-29 14:43:03 18KB hisi3559 can bus 总线驱动
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Philips I2C Bus Specification V2.1
2021-09-28 11:41:41 303KB Philips I2C SPEC 2.1
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CAN-bus通用测试软件(CANtest)是一款可实现CAN数据的收发,监测CAN总线上的数据的通用测试软件。 CAN总线系统的优点: ① 比传统的布线方式的数据传输速度更高。 ② 比传统布线方式要节省线束,降低了车身重量,同时优化了车身的布线方式。 ③ 以CAN总线方式连接的控制单元中有一个发生故障,其它控制单元仍可发送各自的数据,互不影响。 ④ CAN数据总线为双线制,如果有一条发
2021-09-27 09:48:39 10.01MB 应用软件
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开源的Can Controller的可综合IP Core 代码,来自sourcecore网站。By Igor
2021-09-25 21:53:01 51KB CAN-BUS Verilog IP core
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PCI Local Bus Specification 2.2 The PCI Special Interest Group disclaims all warranties and liability for the use of this document and the information contained herein and assumes no responsibility for any errors that may appear in this document, nor does the PCI Special Interest Group make a commitment to update the information contained herein.
2021-09-23 15:03:51 3.61MB PCI Local Bus 2.2
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Connected Bus Lanner.mht
2021-09-18 19:03:18 2.58MB 交通 V2X
周立功出品,必属精品。以PPT的形式详细介绍了CAN总线的应用,深入浅出,适合初学者参考。
2021-09-17 11:04:48 77.11MB CAN总线
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主要介绍了vue 组件之间事件触发($emit)与event Bus($on)的用法说明,具有很好的参考价值,希望对大家有所帮助。一起跟随小编过来看看吧
2021-09-15 16:20:15 211KB vue $emit eventBus $on
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Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-chip communication architectures have been designed to support all inter-component communication in a SoC design. These communication architecture fabrics have a critical impact on the power consumption, performance, cost and design cycle time of modern SoC designs. As application complexity strains the communication backbone of SoC designs, academic and industrial R&D efforts and dollars are increasingly focused on communication architecture design.
2021-09-15 15:42:57 3.64MB SoC Bus
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