### JZ4760 Mobile Application Processor Programming Manual The JZ4760 Mobile Application Processor is a comprehensive and powerful system-on-a-chip (SoC) designed by Ingenic Semiconductor Co., Ltd. This programming manual provides detailed information about the architecture, components, and functionalities of the JZ4760 processor, making it an essential reference for developers working with this platform. #### Overview The JZ4760 is designed to cater to the needs of mobile applications, offering a blend of high performance and low power consumption. The SoC integrates a variety of cores and subsystems, including CPU, VPU (Video Processing Unit), GPU (Graphics Processing Unit), memory subsystems, and various peripherals. It supports multimedia functionalities and has a rich set of interfaces for connectivity and user interaction. #### Block Diagram The block diagram provided in the manual outlines the key components of the JZ4760 processor, such as the CPU core, VPU core, GPU core, memory subsystems, AHBBus Arbiter, and system devices. This visual representation helps developers understand the interconnections between these components and how they interact within the SoC. #### Features The JZ4760 boasts a range of features that make it suitable for mobile application processors: - **CPU Core**: The CPU core is the primary processing unit of the JZ4760. It is designed to provide high computational performance while maintaining low power consumption. Additional features specific to the CPU core in the JZ4760 are also described in the manual. - **VPU Core**: The VPU core is responsible for video processing tasks. It includes dedicated hardware blocks for video acceleration, enabling efficient handling of video content. - **GPU Core**: The GPU core handles graphics processing and rendering, supporting advanced graphical interfaces and user experiences. - **Memory Sub-systems**: The JZ4760 includes sophisticated memory subsystems designed to support fast data access and efficient memory management. - **AHBBus Arbiter**: The AHBBus Arbiter manages access to the Advanced High-performance Bus (AHB) and ensures that multiple components can communicate effectively without conflicts. - **System Devices**: Various system devices are integrated into the JZ4760, providing additional functionalities and interfaces for external connectivity. - **Audio/Display/UI Interfaces**: Rich multimedia capabilities are supported through dedicated audio, display, and UI interfaces. - **On-chip Peripherals**: On-chip peripherals such as timers, UARTs, and GPIOs enhance the functionality of the processor and facilitate communication with external devices. - **Bootrom**: The Bootrom contains the initial boot code, which is executed during the startup sequence of the device. #### CPU Core The CPU core is a critical component of the JZ4760, designed for optimal performance in mobile applications. Key features include: - **Block Diagram**: A detailed block diagram of the CPU core is provided, illustrating its internal architecture and components. - **Extra Features**: Specific extra features of the CPU core in the JZ4760 are highlighted, offering insights into its unique capabilities compared to other processors. - **Instruction Cycles**: Information on the instruction cycles of the CPU core is given, detailing how instructions are processed and executed. - **TCSM (Temporary Code Storage Memory)**: TCSM is a memory region used for temporary code storage. Details on the physical address range occupied by TCSM are provided. - **PMON (Power Monitor)**: PMON monitors power consumption and can be configured to control power-saving modes. #### VPU Core The VPU core is specialized for video processing and includes features like: - **Block Diagram**: A block diagram of the VPU core is included, showing its internal structure and components. - **Features of VPU**: Key features of the VPU are described, highlighting its capabilities in video processing. - **AUX**: AUX is a feature that provides additional functionalities related to the VPU core. Definitions of AUX memory-mapped registers are provided. - **TCSM/SRAM**: Details on the usage of TCSM and SRAM spaces within the VPU core are given. - **GP_DMA (General Purpose Direct Memory Access)**: GP_DMA is a mechanism for direct memory access, allowing efficient data transfer between memory and peripherals. - **Video Acceleration Block**: The video acceleration block is a dedicated hardware component designed to accelerate video processing tasks. #### GPU Core The GPU core plays a crucial role in rendering graphics and supports various operations and features, including line drawing capabilities. In summary, the JZ4760 Mobile Application Processor is a highly capable SoC designed for mobile applications, offering a robust combination of processing power, multimedia capabilities, and connectivity options. The programming manual serves as a comprehensive guide for developers, providing detailed information on the architecture and functionalities of the JZ4760.

型号：JZ4760    公司：北京君正集成电路股份有限公司    英文名称：Ingenic Semiconductor Co.,Ltd.     芯片概述     JZ4760是大陆本土首颗面向智能手机、平板电脑等移动设备的双核CPU应用处理器芯片，采用君正自主创新的XBurst 双核CPU微体系架构，是国产CPU首次进入智能手机和平板电脑领域。JZ4760芯片CPU主频达600MHz，支持720P高清解码和图形处理功能，与同类芯片相比具有的性价比和的运行功耗，支持Android、Linux、RTOS等操作系统，适用于智能手机、平板电脑、移动互联网电视等移动互联网终端产品。    JZ476

JZ4760B Mobile Application Processor User-Interfaces Programming Manual